Avoiding electromigration problems

At the time of publication of this TLP, in the International Technology Roadmap for Semiconductors, the top three challenges facing the industry were given as:

• Problems with integration and material characterization arising from rapid introduction of new materials and processes, which are necessary to meet conductivity requirements and reduce dielectric permittivity.

• Engineering interconnect structures which can be manufactured and are compatible with new materials, because there is a lack of interconnect/packaging architecture design optimization tools to include: integration complexity, chemical mechanical polishing (CMP) damage, resist poisoning, and dielectric constant degradation.
  

• Achieving necessary reliability by using new materials, structures and processes; and the need for detection, testing, modelling and control of failure mechanisms.

Failure mechanisms, such as electromigration, create reliability problems. Therefore, the need for reliability within ICs drives research to make further development in avoiding electromigration failure. This is a huge challenge to the microelectronics industry as everything tends towards smaller and smaller components.

There are several factors affecting the lifespan of interconnects. These can be divided into two classifications: material and processing; and external conditions.

Electromigration failures take time to develop and the early stages are difficult to detect. As electromigration damage is cumulative, it is best to prevent damage from occurring during the lifetime of the device.

Careful design helps to prevent electromigration-induced damage. This includes: ensuring that current densities in all parts of the circuit are limited, so as to have sufficient current to run the device yet minimizing any potential electromigration damage; choosing metallization compositions to limit electromigration degradation; and making good selections for passivating thin films placed over metal lines to prevent extrusions caused by electromigration. An example of this is the move towards changing Al-based metallization to Cu-based metallization.

Grain structure of metallization lines can also be optimized (see Flux Divergence - Differences in Grain Size)

When designing a device, the median lifetime is often estimated using Black’s Law:

\[{t_{50}} = c{j^{ - n}}{e^{\frac{{{E_e}}}{{kT}}}}\]

where t₅₀ =  median time to failure of metal lines subjected to electromigration (hrs); c = constant based on the metal line properties (units depend on exponent n); j = current density (A m^-2); n = value between 1 and 7 (though commonly 2); E_e = activation energy (J) [within the range 0.5–0.7 for Al]; k = Boltzmann constant (1.38×10^-23 J K^-1); and T = temperature (K).

Black’s law is an empirically found relationship. This relationship is found by performing experiments at higher current densities and temperatures, to speed up the time to failure. The data is then extrapolated down to the service conditions for the current density and temperature of the IC.

Optimising the median lifetime is difficult, as exact and verified values are required for the current densities in order to make a reasonable estimation. It is challenging to obtain the data required. It is also uncertain if such an extrapolation of data is possible for a suitable estimation. Therefore, it is often that an attempt can only be made to limit the current density, in order to give the desired lifetime.

An alternative is to make use of other materials and their properties. Currently, refractory or barrier layers e.g. TiN, TiW, Cr₂O₃ are used to carry the current after an open circuit results from void formation, thus giving the device a longer lifetime before failure.